| No. |
Part Name |
Description |
Manufacturer |
| 1 |
1417 |
Bulk Metal Foil Technology, 8 Pin Transistor Outline Hermetic Resistor Network, Alternative Layout to Model 1413 |
Vishay |
| 2 |
AB-060 |
CAREFUL LAYOUT TAMES SAMPLE-HOLD PEDESTAL ERRORS |
Burr Brown |
| 3 |
AN18 |
Layout and Design Rules for Data Converters and Other Mixed-Signal Devices |
Cirrus Logic |
| 4 |
AN576 |
PCB LAYOUT OPTIMISATION |
SGS Thomson Microelectronics |
| 5 |
AN821 |
NEW LAYOUT INSULATION REQUIREMENT |
SGS Thomson Microelectronics |
| 6 |
TLV320AIC20K |
Layout and Grounding Guidelines for TLV320AIC2x |
Texas Instruments |
| 7 |
TLV320AIC21CPFBRG4 |
Layout and Grounding Guidelines for TLV320AIC2x |
Texas Instruments |
| 8 |
TLV320AIC24K |
Layout and Grounding Guidelines for TLV320AIC2x |
Texas Instruments |
| | | |
