No. |
Part Name |
Description |
Manufacturer |
1 |
5962F1120101QXA |
72-Mbit QDR� II+ SRAM Two-Word Burst Architecture with RadStop™ Technology |
Cypress |
2 |
5962F1120101VXA |
72-Mbit QDR� II+ SRAM Two-Word Burst Architecture with RadStop™ Technology |
Cypress |
3 |
5962F1120102QXA |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture with RadStop™ Technology |
Cypress |
4 |
5962F1120102VXA |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture with RadStop™ Technology |
Cypress |
5 |
5962F1120201QXA |
72-Mbit QDR� II+ SRAM Two-Word Burst Architecture with RadStop™ Technology |
Cypress |
6 |
5962F1120202QXA |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture with RadStop™ Technology |
Cypress |
7 |
AB-178 |
CDAC ARCHITECTURE PLUS RESISTOR DIVIDER GIVES ADC574 PINOUT WITH SAMPLING, LOW POWER, NEW INPUT RANGES |
Burr Brown |
8 |
AMD64 |
AMD64 Architecture Programmer's Manual Volume 2: System Programming |
Advanced Micro Devices |
9 |
AMD64 |
AMD64 Architecture Programmer's Manual Volume 1: Application Programming |
Advanced Micro Devices |
10 |
AMD64 |
AMD64 Architecture Programmer's Manual Volume 4: 128-Bit Media Instructions |
Advanced Micro Devices |
11 |
AMD64 |
AMD64 Architecture Programmer's Manual Volume 3: General-Purpose and System Instructions |
Advanced Micro Devices |
12 |
AMD64 |
AMD64 Architecture Programmer's Manual Volume 5: 64-Bit Media and x87 Floating-Point Instructions |
Advanced Micro Devices |
13 |
AT697E |
The AT697E is a highly-integrated, high-performance 32-bit RISC embedded processor implementing the SPARC architecture V8 specification. The implementation is based on the European Space Agency (ESA) LEON2 fault tolerant model. |
Atmel |
14 |
AT75C140 |
This Smart Internet Appliance Processor is a high-performance processor specially designed for network-enabling consumer and industrial applications. The specific architecture of this device delivers unmatched performance for low power con |
Atmel |
15 |
CY7C1143KV18-400BZI |
18-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency) |
Cypress |
16 |
CY7C1143KV18-450BZC |
18-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency) |
Cypress |
17 |
CY7C1145KV18-400BZXC |
18-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency) |
Cypress |
18 |
CY7C1145KV18-400BZXCT |
18-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency) |
Cypress |
19 |
CY7C1145KV18-400BZXI |
18-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency) |
Cypress |
20 |
CY7C1145KV18-450BZXC |
18-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency) |
Cypress |
21 |
CY7C1148KV18-400BZC |
18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) |
Cypress |
22 |
CY7C1148KV18-400BZXC |
18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) |
Cypress |
23 |
CY7C1148KV18-450BZXC |
18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) |
Cypress |
24 |
CY7C1150KV18-400BZXC |
18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) |
Cypress |
25 |
CY7C1150KV18-400BZXI |
18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency) |
Cypress |
26 |
CY7C1163KV18-400BZI |
18-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
27 |
CY7C1163KV18-550BZC |
18-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
28 |
CY7C1165KV18-400BZC |
18-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
29 |
CY7C1165KV18-400BZXC |
18-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
30 |
CY7C1165KV18-550BZC |
18-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
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