| No. |
Part Name |
Description |
Manufacturer |
| 1 |
BTW18-50 |
Bi-Directional Triode Thyristor (TRIAC) |
Transitron Electronic |
| 2 |
BTW18-500 |
Bi-Directional Triode Thyristor (TRIAC) |
Transitron Electronic |
| 3 |
BTX18-500 |
SILICON THYRISTORS |
Comset Semiconductors |
| 4 |
BTX18-500 |
Thyristor |
mble |
| 5 |
BTX18-500 |
Thyristors and stacks thyristors |
Mullard |
| 6 |
BTX18-500 |
Silicon Thyristors 500V |
Philips |
| 7 |
BUK118-50DL |
Logic level TOPFET |
Philips |
| 8 |
BUK129-50DL |
Logic level TOPFET SMD version of BUK118-50DL |
NXP Semiconductors |
| 9 |
BUK129-50DL |
Logic level TOPFET SMD version of BUK118-50DL |
Philips |
| 10 |
BUK139-50DL |
Logic level TOPFET D-PAK version of BUK118-50DL |
NXP Semiconductors |
| 11 |
BUK139-50DL |
Logic level TOPFET D-PAK version of BUK118-50DL |
Philips |
| 12 |
BUK218-50DC |
TOPFET dual high side switch |
Philips |
| 13 |
BUK218-50DY |
TOPFET dual high side switch |
Philips |
| 14 |
CY7C1263KV18-500BZXC |
36-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 15 |
CY7C15632KV18-500BZXI |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 16 |
CY7C1565KV18-500BZC |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 17 |
CY7C1565KV18-500BZI |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 18 |
CY7C1565KV18-500BZXC |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 19 |
CY7C1565KV18-500BZXI |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 20 |
CY7C1568KV18-500BZXI |
72-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 21 |
CY7C1570KV18-500BZC |
72-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 22 |
CY7C1570KV18-500BZXC |
72-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 23 |
CY7C1570KV18-500BZXI |
72-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 24 |
CY7C25632KV18-500BZC |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 25 |
CY7C25632KV18-500BZXC |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 26 |
CY7C25632KV18-500BZXI |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 27 |
CY7C25652KV18-500BZC |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 28 |
CY7C25652KV18-500BZI |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 29 |
CY7C25652KV18-500BZXC |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 30 |
CY7C25652KV18-500BZXI |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| | | |
