No. |
Part Name |
Description |
Manufacturer |
1 |
BUK7518-55 |
TrenchMOS transistor Standard level FET |
Philips |
2 |
BUK7618-55 |
N-channel TrenchMOS standard level FET |
Nexperia |
3 |
BUK7618-55 |
N-channel TrenchMOS standard level FET |
NXP Semiconductors |
4 |
BUK7618-55 |
TrenchMOS transistor Standard level FET |
Philips |
5 |
BUK7Y18-55B |
N-channel TrenchMOS standard level FET |
Nexperia |
6 |
BUK7Y18-55B |
N-channel TrenchMOS standard level FET |
NXP Semiconductors |
7 |
BUK9518-55 |
TrenchMOS transistor Logic level FET |
Philips |
8 |
BUK9518-55A |
N-channel TrenchMOS logic level FET |
NXP Semiconductors |
9 |
BUK9518-55A |
TrenchMOS(tm) logic level FET |
Philips |
10 |
BUK9618-55 |
TrenchMOS transistor Logic level FET |
Philips |
11 |
BUK9618-55A |
N-channel TrenchMOS logic level FET |
NXP Semiconductors |
12 |
BUK9618-55A |
TrenchMOS(tm) logic level FET |
Philips |
13 |
CS218-55B |
Leaded Thyristor SCR |
Central Semiconductor |
14 |
CS218-55D |
Leaded Thyristor SCR |
Central Semiconductor |
15 |
CS218-55M |
Leaded Thyristor SCR |
Central Semiconductor |
16 |
CS218-55N |
Leaded Thyristor SCR |
Central Semiconductor |
17 |
CS218-55P |
Leaded Thyristor SCR |
Central Semiconductor |
18 |
CS218-55PB |
Leaded Thyristor SCR |
Central Semiconductor |
19 |
CY62167G18-55BVXIES |
16-Mbit (1 M words � 16 bit / 2 M words � 8 bit) Static RAM with Error-Correcting Code (ECC) |
Cypress |
20 |
CY7C1163KV18-550BZC |
18-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
21 |
CY7C1165KV18-550BZC |
18-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
22 |
CY7C1165KV18-550BZXC |
18-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
23 |
CY7C1168KV18-550BZXC |
18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
24 |
CY7C1170KV18-550BZC |
18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
25 |
CY7C1263KV18-550BZXC |
36-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
26 |
CY7C1265KV18-550BZC |
36-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
27 |
CY7C1265KV18-550BZXC |
36-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
28 |
CY7C1268KV18-550BZXC |
36-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
29 |
CY7C1565KV18-550BZXC |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
30 |
CY7C1568KV18-550BZXC |
72-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
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