| No. |
Part Name |
Description |
Manufacturer |
| 1 |
104S11AX0 |
Selenium Contact Protector Rectifiers, DC applications - 10 breaks/second max |
ITT Semiconductors |
| 2 |
104S11AX1 |
Selenium Contact Protector Rectifiers, DC applications - 40 breaks/second max |
ITT Semiconductors |
| 3 |
54S11 |
Triple 3-Input AND gate |
Fairchild Semiconductor |
| 4 |
54S112 |
Dual JK Negative Edge-Triggered Flip-Flop |
Fairchild Semiconductor |
| 5 |
54S113 |
Dual JK Edge-Triggered Flip-Flop |
Fairchild Semiconductor |
| 6 |
54S114 |
Dual JK Negative Edge-Triggered Flip-Flop (With Common Clocks and Clears) |
Fairchild Semiconductor |
| 7 |
74S11 |
Triple 3-Input AND gate |
Fairchild Semiconductor |
| 8 |
74S112 |
Dual JK Negative Edge-Triggered Flip-Flop |
Fairchild Semiconductor |
| 9 |
74S113 |
Dual JK Edge-Triggered Flip-Flop |
Fairchild Semiconductor |
| 10 |
74S114 |
Dual JK Negative Edge-Triggered Flip-Flop (With Common Clocks and Clears) |
Fairchild Semiconductor |
| 11 |
BU4S11 |
Standard Logic LSIs > CMOS logic BU4S Series |
ROHM |
| 12 |
BU4S11G2 |
Single Gate CMOS Logic ICs <Logic Gate> |
ROHM |
| 13 |
BU4S11G2-TR |
Single Gate CMOS Logic ICs <Logic Gate> |
ROHM |
| 14 |
DM54S11 |
Triple 3-Input AND Gate |
National Semiconductor |
| 15 |
DM54S112 |
Dual Negative-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs |
National Semiconductor |
| 16 |
DM54S112J |
7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output |
National Semiconductor |
| 17 |
DM54S113 |
Dual Negative-Edge-Triggered J-K Flip-Flop with Preset and Complementary Outputs |
National Semiconductor |
| 18 |
DM54S113J |
7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset and complementary output |
National Semiconductor |
| 19 |
DM54S114 |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Common Clear, Common Clock and Complementary Outputs |
National Semiconductor |
| 20 |
DM74S11 |
Triple 3-Input AND Gate |
Fairchild Semiconductor |
| 21 |
DM74S11 |
Triple 3-Input AND Gate |
National Semiconductor |
| 22 |
DM74S112 |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs |
Fairchild Semiconductor |
| 23 |
DM74S112 |
Dual Negative-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs |
National Semiconductor |
| 24 |
DM74S112CW |
Dual Negative-Edge-Triggered J-K Flip-Flop with Preset Clear and Complementary Outputs |
Fairchild Semiconductor |
| 25 |
DM74S112N |
Dual Negative-Edge-Triggered J-K Flip-Flop with Preset Clear and Complementary Outputs |
Fairchild Semiconductor |
| 26 |
DM74S112N |
7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output |
National Semiconductor |
| 27 |
DM74S113 |
Dual Negative-Edge-Triggered J-K Flip-Flop with Preset and Complementary Ouputs |
National Semiconductor |
| 28 |
DM74S113N |
7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset and complementary output |
National Semiconductor |
| 29 |
DM74S114 |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Common Clear, Common Clock and Complementary Outputs |
National Semiconductor |
| 30 |
DM74S11N |
Triple 3-Input AND Gate |
Fairchild Semiconductor |
| | | |
