No. |
Part Name |
Description |
Manufacturer |
1 |
54LS11 |
Triple 3-Input AND gate |
Fairchild Semiconductor |
2 |
54LS11 |
Triple 3-Input AND Gates |
IPRS Baneasa |
3 |
54LS11 |
Triple 3-Input AND Gate |
National Semiconductor |
4 |
54LS112 |
Dual JK Negative Edge-Triggered Flip-Flop |
Fairchild Semiconductor |
5 |
54LS112 |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear and Complementary OP |
National Semiconductor |
6 |
54LS112DMQB |
7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output |
National Semiconductor |
7 |
54LS112FMQB |
7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output |
National Semiconductor |
8 |
54LS112LMQB |
7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output |
National Semiconductor |
9 |
54LS113 |
Dual JK Edge-Triggered Flip-Flop |
Fairchild Semiconductor |
10 |
54LS113 |
Dual JK Edge Triggered Flip-Flop |
National Semiconductor |
11 |
54LS113DMQB |
Dual JK Edge-Triggered Flip-Flop |
National Semiconductor |
12 |
54LS113FMQB |
Dual JK Edge-Triggered Flip-Flop |
National Semiconductor |
13 |
54LS113LMQB |
Dual JK Edge-Triggered Flip-Flop |
National Semiconductor |
14 |
54LS114 |
Dual JK Negative Edge-Triggered Flip-Flop (With Common Clocks and Clears) |
Fairchild Semiconductor |
15 |
54LS114 |
Dual Negative Edge-Triggered Flip-Flop with Common Clocks and Clears |
National Semiconductor |
16 |
54LS114DMQB |
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears |
National Semiconductor |
17 |
54LS114FMQB |
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears |
National Semiconductor |
18 |
54LS114LMQB |
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears |
National Semiconductor |
19 |
54LS11E |
Triple 3-Input AND Gates |
National Semiconductor |
20 |
54LS11J |
Triple 3-Input AND Gates |
National Semiconductor |
21 |
54LS11M |
Triple 3-Input AND Gates |
National Semiconductor |
22 |
54LS11N |
Triple 3-Input AND Gates |
National Semiconductor |
23 |
54LS11W |
Triple 3-Input AND Gates |
National Semiconductor |
24 |
DM54LS11 |
Triple 3-Input AND Gate |
National Semiconductor |
25 |
DM54LS112A |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear and Complementary OP |
National Semiconductor |
26 |
DM54LS112AJ |
7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output |
National Semiconductor |
27 |
DM54LS112AW |
7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output |
National Semiconductor |
28 |
DM54LS113A |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset and Complementary Outputs |
National Semiconductor |
29 |
DM54LS114A |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset and Common Clear, Common Clock adn Complementary Outputs |
National Semiconductor |
30 |
DM54LS11E |
Triple 3-Input AND Gates |
National Semiconductor |
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