| No. |
Part Name |
Description |
Manufacturer |
| 1 |
CAT93C5632K-25TE13 |
2K 2.55-2.7V Supervisory circuit with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 2 |
CAT93C5632K-28TE13 |
2K 2.85-3.0V Supervisory circuit with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 3 |
CAT93C5632K-30TE13 |
2K 3.0-3.15V Supervisory circuit with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 4 |
CAT93C5632K-42TE13 |
2K 4.25-4.5V Supervisory circuit with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 5 |
CAT93C5632K-45TE13 |
2K 4.5-4.75V Supervisory circuits with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 6 |
CAT93C5632KA-25TE13 |
2K 2.55-2.7V Supervisory circuit with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 7 |
CAT93C5632KA-28TE13 |
2K 2.85-3.0V Supervisory circuit with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 8 |
CAT93C5632KA-30TE13 |
2K 3.0-3.15V Supervisory circuit with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 9 |
CAT93C5632KA-42TE13 |
2K 4.25-4.5V Supervisory circuits with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 10 |
CAT93C5632KA-45TE13 |
2K 4.5-4.75V Supervisory circuits with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 11 |
CAT93C5632KI-25TE13 |
2K 2.55-2.7V Supervisory circuit with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 12 |
CAT93C5632KI-28TE13 |
2K 2.85-3.0V Supervisory circuit with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 13 |
CAT93C5632KI-30TE13 |
2K 3.0-3.15V Supervisory circuit with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 14 |
CAT93C5632KI-42TE13 |
2K 4.25-4.5V Supervisory circuits with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 15 |
CAT93C5632KI-45TE13 |
2K 4.5-4.75V Supervisory circuits with microwire serial CMOS EEPROM, precision reset controller and watchdog timer |
Catalyst Semiconductor |
| 16 |
CY7C15632KV18-400BZC |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 17 |
CY7C15632KV18-400BZXC |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 18 |
CY7C15632KV18-400BZXI |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 19 |
CY7C15632KV18-450BZC |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 20 |
CY7C15632KV18-450BZXC |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 21 |
CY7C15632KV18-450BZXI |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 22 |
CY7C15632KV18-500BZXI |
72-Mbit QDR� II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 23 |
CY7C25632KV18-400BZC |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 24 |
CY7C25632KV18-400BZXI |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 25 |
CY7C25632KV18-450BZC |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 26 |
CY7C25632KV18-450BZXI |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 27 |
CY7C25632KV18-500BZC |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 28 |
CY7C25632KV18-500BZXC |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 29 |
CY7C25632KV18-500BZXI |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 30 |
CY7C25632KV18-550BZC |
72-Mbit QDR�II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| | | |
