| No. |
Part Name |
Description |
Manufacturer |
| 1 |
AD6633BBCZ |
Multi-channel Digital Upconverter with VersaCREST™ Crest Reduction Engine |
Analog Devices |
| 2 |
CY7C1263XV18-633BZXC |
36-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 3 |
CY7C1265XV18-633BZXC |
36-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 4 |
CY7C1268XV18-633BZXC |
36-Mbit DDR II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 5 |
CY7C1270XV18-633BZXC |
36-Mbit DDR II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 6 |
CY7C1563XV18-633BZXC |
72-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 7 |
CY7C1565XV18-633BZXC |
72-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 8 |
CY7C1568XV18-633BZXC |
72-Mbit DDR II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 9 |
CY7C1570XV18-633BZXC |
72-Mbit DDR II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| 10 |
CY7C2263XV18-633BZXC |
36-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 11 |
CY7C2265XV18-633BZXC |
36-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 12 |
CY7C2268XV18-633BZXC |
36-Mbit DDR II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 13 |
CY7C2270XV18-633BZXC |
36-Mbit DDR II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 14 |
CY7C2563XV18-633BZC |
72-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 15 |
CY7C2563XV18-633BZXC |
72-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 16 |
CY7C2565XV18-633BZC |
72-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 17 |
CY7C2565XV18-633BZXC |
72-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 18 |
CY7C2568XV18-633BZXC |
72-Mbit DDR II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 19 |
CY7C2570XV18-633BZXC |
72-Mbit DDR II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT |
Cypress |
| 20 |
MAX633BC/D |
5V Fixed/Adjustable Output, Step-Up Switching Regulators |
MAXIM - Dallas Semiconductor |
| 21 |
MAX633BCJA |
5V Fixed/Adjustable Output, Step-Up Switching Regulators |
MAXIM - Dallas Semiconductor |
| 22 |
MAX633BCPA |
CMOS fixed +15V output voltage, adjustable output with 2 resistors step-up switching regulator. 10% output accuracy. |
MAXIM - Dallas Semiconductor |
| 23 |
MAX633BCSA |
CMOS fixed +15V output voltage, adjustable output with 2 resistors step-up switching regulator. 10% output accuracy. |
MAXIM - Dallas Semiconductor |
| 24 |
MAX633BC_D |
CMOS fixed +15V output voltage, adjustable output with 2 resistors step-up switching regulator. 10% output accuracy. |
MAXIM - Dallas Semiconductor |
| 25 |
MAX633BEJA |
CMOS fixed +15V output voltage, adjustable output with 2 resistors step-up switching regulator. 10% output accuracy. |
MAXIM - Dallas Semiconductor |
| 26 |
MAX633BEPA |
CMOS fixed +15V output voltage, adjustable output with 2 resistors step-up switching regulator. 10% output accuracy. |
MAXIM - Dallas Semiconductor |
| 27 |
MAX633BESA |
CMOS fixed +15V output voltage, adjustable output with 2 resistors step-up switching regulator. 10% output accuracy. |
MAXIM - Dallas Semiconductor |
| 28 |
MAX633BMJA |
CMOS fixed +15V output voltage, adjustable output with 2 resistors step-up switching regulator. 10% output accuracy. |
MAXIM - Dallas Semiconductor |
| 29 |
MAX633BMJA/883B |
5V Fixed/Adjustable Output, Step-Up Switching Regulators |
MAXIM - Dallas Semiconductor |
| 30 |
MP7633BD |
CMOS 10-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTER |
etc |
| | | |
