No. |
Part Name |
Description |
Manufacturer |
1 |
54LS/74LS76 |
DUAL JK FLIP - FLOP |
Signetics |
2 |
74LS73 |
Dual JK Flip-Flop (With Separate Clears and Clocks) |
Fairchild Semiconductor |
3 |
74LS73 |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs |
Fairchild Semiconductor |
4 |
74LS73 |
Dual J-K Flip-Flops(with Clear) |
Hitachi Semiconductor |
5 |
74LS73 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
Motorola |
6 |
74LS73 |
DUAL J-K FLIP-FLOPS WITH CLEAR |
Texas Instruments |
7 |
74LS73A |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs |
Fairchild Semiconductor |
8 |
74LS73A |
Dual J-K Flip-Flops(with Clear) |
Hitachi Semiconductor |
9 |
74LS73A |
DUAL J-K FLIP-FLOPS WITH CLEAR |
Texas Instruments |
10 |
74LS74 |
Dual D-TYPE positive edge-triggered flip-flop |
Fairchild Semiconductor |
11 |
74LS74 |
Dual Positive-Edge-Triggered D Flip-Flops with Preset/ Clear and Complementary Outputs |
Fairchild Semiconductor |
12 |
74LS74 |
Dual D-type Positive Edge-triggered Flip-Flops(With Preset and Clear) |
Hitachi Semiconductor |
13 |
74LS74 |
Dual D-Type Positive-Edge-Triggered flip-flops with preset and clear |
IPRS Baneasa |
14 |
74LS74 |
DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP |
Motorola |
15 |
74LS74 |
Dual Positive-Edge-Triggered D Flip-Flops with Preset/ Clear and Complementary Outputs |
National Semiconductor |
16 |
74LS74 |
LOW POWER SCHOTTKY |
ON Semiconductor |
17 |
74LS74A |
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR |
Texas Instruments |
18 |
74LS75 |
Quad Latch |
Fairchild Semiconductor |
19 |
74LS75 |
Quadruple Bistable Latches |
Hitachi Semiconductor |
20 |
74LS75 |
4-BIT D LATCH |
Motorola |
21 |
74LS75 |
4-BIT BISTABLE LATCHES |
Texas Instruments |
22 |
74LS76 |
Dual J-K Flip-Flop(with Preset and Clear) |
Hitachi Semiconductor |
23 |
74LS76 |
LOW POWER SCHOTTKY |
ON Semiconductor |
24 |
74LS77 |
4-BIT D LATCH LOW POWER SCHOTTKY |
Motorola |
25 |
74LS78 |
Dual JK Flip-Flop (With Common Clear and Clock and Separate Set Inputs) |
Fairchild Semiconductor |
26 |
74LS793 |
8 Bit Latch / Register with Readback |
Monolithic Memories |
27 |
74LS794 |
8 Bit Latch / Register with Readback |
Monolithic Memories |
28 |
DL074D |
2 positiv D-Flip-Flop (TTL low-power Schottky series), possibly equivalent SN74LS74N |
RFT |
29 |
DM74LS73A |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs |
Fairchild Semiconductor |
30 |
DM74LS73A |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs |
National Semiconductor |
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