No. |
Part Name |
Description |
Manufacturer |
181 |
BCR400W |
Active Bias Controller (Supplies stable bias current even at low battery voltage and extreme ambient temperature variation) |
Siemens |
182 |
BFT66 |
Extremely low-noise NPN silicon broadband transistor |
Siemens |
183 |
BFT66 |
EXTREMELY LOW NOISE NPN SILICON BROADBAND TRANSISTORS |
Siemens |
184 |
BFT66S |
Epitaxial planar NPN transistor intended for extremely low-noise telecom applications |
SGS-ATES |
185 |
BFT67 |
Extremely low-noise NPN silicon broadband transistor |
Siemens |
186 |
BFT67 |
EXTREMELY LOW NOISE NPN SILICON BROADBAND TRANSISTORS |
Siemens |
187 |
BSH111 |
N-channel TrenchMOS extremely low level FET |
NXP Semiconductors |
188 |
BSH121 |
N-channel TrenchMOS extremely low level FET |
NXP Semiconductors |
189 |
BSN20 |
N-channel TrenchMOS extremely low level FET |
Nexperia |
190 |
BSN20 |
N-channel TrenchMOS extremely low level FET |
NXP Semiconductors |
191 |
CMPTA44 |
NPN SILICON EXTREMELY HIGH VOLTAGE TRANSISTOR |
Central Semiconductor |
192 |
CMPTA46 |
SURFACE MOUNT NPN SILICON EXTREMELY HIGH VOLTAGE TRANSISTOR |
Central Semiconductor |
193 |
CMPTA96 |
SURFACE MOUNT PNP SILICON EXTREMELY HIGH VOLTAGE TRANSISTOR |
Central Semiconductor |
194 |
CY7C1262XV18-366BZXC |
36-Mbit QDR� II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
195 |
CY7C1262XV18-450BZXC |
36-Mbit QDR� II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
196 |
CY7C1263XV18-600BZXC |
36-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
197 |
CY7C1263XV18-633BZXC |
36-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
198 |
CY7C1264XV18-366BZXC |
36-Mbit QDR� II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
199 |
CY7C1264XV18-450BZXC |
36-Mbit QDR� II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
200 |
CY7C1265XV18-600BZXC |
36-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
201 |
CY7C1265XV18-633BZXC |
36-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
202 |
CY7C1268XV18-600BZXC |
36-Mbit DDR II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
203 |
CY7C1268XV18-633BZXC |
36-Mbit DDR II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
204 |
CY7C1270XV18-600BZXC |
36-Mbit DDR II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
205 |
CY7C1270XV18-633BZXC |
36-Mbit DDR II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
206 |
CY7C1562XV18-366BZC |
72-Mbit QDR� II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
207 |
CY7C1562XV18-366BZXC |
72-Mbit QDR� II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
208 |
CY7C1562XV18-450BZC |
72-Mbit QDR� II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
209 |
CY7C1562XV18-450BZXC |
72-Mbit QDR� II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
210 |
CY7C1563XV18-600BZXC |
72-Mbit QDR� II+ Xtreme SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) |
Cypress |
| | | |