No. |
Part Name |
Description |
Manufacturer |
31 |
DM54LS112AW |
7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output |
National Semiconductor |
32 |
DM74ALS112A |
Dual J-K Negative-Edge-Triggered Flip-Flops with Preset and Clear |
National Semiconductor |
33 |
DM74KS112AM |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset/ Clear/ and Complementary Outputs |
Fairchild Semiconductor |
34 |
DM74LS112A |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs |
Fairchild Semiconductor |
35 |
DM74LS112A |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear and Complementary OP |
National Semiconductor |
36 |
DM74LS112ACW |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop |
Fairchild Semiconductor |
37 |
DM74LS112AM |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop |
Fairchild Semiconductor |
38 |
DM74LS112AM |
7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output |
National Semiconductor |
39 |
DM74LS112AMX |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop |
Fairchild Semiconductor |
40 |
DM74LS112AN |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset/ Clear/ and Complementary Outputs |
Fairchild Semiconductor |
41 |
DM74LS112AN |
7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset, clear and complementary output |
National Semiconductor |
42 |
ERZA80JK112A |
Surge Absorbers - Varistor Type J |
Panasonic |
43 |
HFA1112A |
Buffer, Closed Loop, Programmable Gain (+/-1, +2), 850MHz, Video/RF, Optimized for Gain of 1 |
Intersil |
44 |
HM9112A |
Tone/Pulse Switchable & 10 Memory Dialer |
etc |
45 |
IDT74LVC112A |
3.3V CMOS DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET, 5V TOLERANT I/O |
IDT |
46 |
IDT74LVC112APG |
3.3V CMOS Dual Negative-Edge-Triggered J-K Flip-Flop with Clear and Preset, 5.0V Tolerant I/O |
IDT |
47 |
IDT74LVC112APG8 |
3.3V CMOS Dual Negative-Edge-Triggered J-K Flip-Flop with Clear and Preset, 5.0V Tolerant I/O |
IDT |
48 |
J112A |
Trans JFET N-CH 3-Pin TO-92 Bulk |
New Jersey Semiconductor |
49 |
JAN1N6112A |
Transient Voltage Suppressor |
Microsemi |
50 |
JAN1N6112AUS |
Transient Voltage Suppressor |
Microsemi |
51 |
JANS1N6112A |
Transient Voltage Suppressor |
Microsemi |
52 |
JANS1N6112AUS |
Transient Voltage Suppressor |
Microsemi |
53 |
JANTX1N6112A |
Transient Voltage Suppressor |
Microsemi |
54 |
JANTX1N6112AUS |
Transient Voltage Suppressor |
Microsemi |
55 |
JANTXV1N6112A |
Transient Voltage Suppressor |
Microsemi |
56 |
JANTXV1N6112AUS |
Transient Voltage Suppressor |
Microsemi |
57 |
KS54HCTLS112A |
Dual J-K Negative-Edge-Triggered Flip-Flops with Preset and Clear |
Samsung Electronic |
58 |
KS74HCTLS112A |
Dual J-K Negative-Edge-Triggered Flip-Flops with Preset and Clear |
Samsung Electronic |
59 |
LC868112A |
8-Bit Single Chip Microcontroller with 16/12/08K-Byte ROM and 640-Byte RAM On Chip |
SANYO |
60 |
LM1112AN |
24 V, 15 mA, dolby B-type noise reduction processor |
National Semiconductor |
| | | |