No. |
Part Name |
Description |
Manufacturer |
31 |
74HC10D |
Triple 3-input NAND gate |
Nexperia |
32 |
74HC10D |
Triple 3-input NAND gate |
NXP Semiconductors |
33 |
74HC10D |
74HC/HCT10; Triple 3-input NAND gate |
Philips |
34 |
74HC10D-Q100 |
Triple 3-input NAND gate |
Nexperia |
35 |
74HC10D-Q100 |
Triple 3-input NAND gate |
NXP Semiconductors |
36 |
74HC10DB |
Triple 3-input NAND gate |
Nexperia |
37 |
74HC10DB |
Triple 3-input NAND gate |
NXP Semiconductors |
38 |
74HC10DB |
74HC/HCT10; Triple 3-input NAND gate |
Philips |
39 |
74HC10N |
Triple 3-input NAND gate |
NXP Semiconductors |
40 |
74HC10N |
74HC/HCT10; Triple 3-input NAND gate |
Philips |
41 |
74HC10PW |
Triple 3-input NAND gate |
Nexperia |
42 |
74HC10PW |
Triple 3-input NAND gate |
NXP Semiconductors |
43 |
74HC10PW |
74HC/HCT10; Triple 3-input NAND gate |
Philips |
44 |
74HC10PW-Q100 |
Triple 3-input NAND gate |
Nexperia |
45 |
74HC10PW-Q100 |
Triple 3-input NAND gate |
NXP Semiconductors |
46 |
CD54HC10 |
High Speed CMOS Logic Triple 3-Input NAND Gates |
Texas Instruments |
47 |
CD54HC107 |
High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with Reset |
Texas Instruments |
48 |
CD54HC107F3A |
High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with Reset |
Texas Instruments |
49 |
CD54HC109 |
High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset |
Texas Instruments |
50 |
CD54HC109F3A |
High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset |
Texas Instruments |
51 |
CD54HC10F |
High Speed CMOS Logic Triple 3-Input NAND Gates |
Texas Instruments |
52 |
CD54HC10F3A |
High Speed CMOS Logic Triple 3-Input NAND Gates |
Texas Instruments |
53 |
CD74HC10 |
High Speed CMOS Logic Triple 3-Input NAND Gates |
Texas Instruments |
54 |
CD74HC107 |
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset |
Texas Instruments |
55 |
CD74HC107E |
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset |
Texas Instruments |
56 |
CD74HC107EE4 |
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-PDIP -55 to 125 |
Texas Instruments |
57 |
CD74HC107M |
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset |
Texas Instruments |
58 |
CD74HC107M96 |
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset |
Texas Instruments |
59 |
CD74HC107M96E4 |
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125 |
Texas Instruments |
60 |
CD74HC107M96G4 |
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125 |
Texas Instruments |
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