| No. |
Part Name |
Description |
Manufacturer |
| 61 |
74HCT109PW |
Dual JK flip-flop with set and reset; positive-edge trigger |
NXP Semiconductors |
| 62 |
74HCT109PW |
74HC/HCT109; Dual JK flip-flop with set and reset; positive-edge trigger |
Philips |
| 63 |
74HCT109PW |
74HC/HCT109; Dual JK flip-flop with set and reset; positive-edge trigger |
Philips |
| 64 |
74HCT109U |
Dual JK flip-flop with set and reset; positive-edge trigger |
Philips |
| 65 |
CD54ACT109 |
Dual J-K Flip-Flop with Set and Reset |
Intersil |
| 66 |
CD54ACT109 |
Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset |
Texas Instruments |
| 67 |
CD54ACT109F3A |
Dual J-K Flip-Flop with Set and Reset |
Intersil |
| 68 |
CD54ACT109F3A |
Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset |
Texas Instruments |
| 69 |
CD54HCT109 |
High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset |
Texas Instruments |
| 70 |
CD54HCT109F3A |
High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset |
Texas Instruments |
| 71 |
CD74ACT109 |
Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset |
Texas Instruments |
| 72 |
CD74ACT109E |
Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset |
Texas Instruments |
| 73 |
CD74ACT109EE4 |
Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 |
Texas Instruments |
| 74 |
CD74ACT109M |
Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset |
Texas Instruments |
| 75 |
CD74ACT109M96 |
Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset |
Texas Instruments |
| 76 |
CD74ACT109M96E4 |
Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
Texas Instruments |
| 77 |
CD74ACT109ME4 |
Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
Texas Instruments |
| 78 |
CD74HCT109 |
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset |
Texas Instruments |
| 79 |
CD74HCT109E |
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset |
Texas Instruments |
| 80 |
CD74HCT109EE4 |
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 |
Texas Instruments |
| 81 |
CD74HCT109M |
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset |
Texas Instruments |
| 82 |
CD74HCT109M96 |
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset |
Texas Instruments |
| 83 |
CD74HCT109MG4 |
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
Texas Instruments |
| 84 |
CD74HCT109MT |
High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset |
Texas Instruments |
| 85 |
IN74ACT109D |
Dual J-K flip-flop with set and reset high-speed silicon-gate CMOS |
INTEGRAL |
| 86 |
IN74ACT109N |
Dual J-K flip-flop with set and reset high-speed silicon-gate CMOS |
INTEGRAL |
| 87 |
IN74HCT109 |
DUAL J-K FLIP-FLOP WITH SET AND RESET |
INTEGRAL Semiconductor Devices |
| 88 |
MC74ACT109 |
DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP |
ON Semiconductor |
| 89 |
MC74ACT109D |
DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP |
Motorola |
| 90 |
MC74ACT109D |
Dual JK Positive Edge Triggered Flip Flop |
ON Semiconductor |
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