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Datasheets found :: 4418
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| No. | Part Name | Description | Manufacturer |
|---|---|---|---|
| 661 | 74AUP1G08GW-Q100 | Low-power 2-input AND gate | Nexperia |
| 662 | 74AUP1G08GW-Q100 | Low-power 2-input AND gate | NXP Semiconductors |
| 663 | 74AUP1G09GW-Q100 | Low-power 2-input AND gate with open-drain | Nexperia |
| 664 | 74AUP1G125GM-Q100 | Low-power buffer/line driver; 3-state | Nexperia |
| 665 | 74AUP1G125GS-Q100 | Low-power buffer/line driver; 3-state | Nexperia |
| 666 | 74AUP1G125GW-Q100 | Low-power buffer/line driver; 3-state | Nexperia |
| 667 | 74AUP1G125GW-Q100 | Low-power buffer/line driver; 3-state | NXP Semiconductors |
| 668 | 74AUP1G132GW-Q100 | Low-power 2-input NAND Schmitt trigger | Nexperia |
| 669 | 74AUP1G157GM-Q100 | Low-power 2-input multiplexer | Nexperia |
| 670 | 74AUP1G175GW-Q100 | Low-power D-type flip-flop with reset; positive-edge trigger | Nexperia |
| 671 | 74AUP1G175GW-Q100 | Low-power D-type flip-flop with reset; positive-edge trigger | NXP Semiconductors |
| 672 | 74AUP1G32GM-Q100 | Low-power 2-input OR-gate | Nexperia |
| 673 | 74AUP1G32GW-Q100 | Low-power 2-input OR-gate | Nexperia |
| 674 | 74AUP1G32GW-Q100 | Low-power 2-input OR-gate | NXP Semiconductors |
| 675 | 74AUP1G34GW-Q100 | Low-power buffer | Nexperia |
| 676 | 74AUP1G34GW-Q100 | Low-power buffer | NXP Semiconductors |
| 677 | 74AUP1G373GW-Q100 | Low-power D-type transparent latch; 3-state | Nexperia |
| 678 | 74AUP1G373GW-Q100 | Low-power D-type transparent latch; 3-state | NXP Semiconductors |
| 679 | 74AUP1G374GW-Q100 | Low-power D-type flip-flop; positive-edge trigger; 3-state | Nexperia |
| 680 | 74AUP1G374GW-Q100 | Low-power D-type flip-flop; positive-edge trigger; 3-state | NXP Semiconductors |
| 681 | 74AUP1G74DC-Q100 | Low-power D-type flip-flop with set and reset; positive-edge trigger | Nexperia |
| 682 | 74AUP1G86GW-Q100 | Low-power 2-input EXCLUSIVE-OR gate | Nexperia |
| 683 | 74AUP1T34GM-Q100 | Low-power dual supply translating buffer | Nexperia |
| 684 | 74AUP1T34GW-Q100 | Low-power dual supply translating buffer | Nexperia |
| 685 | 74AUP1T34GW-Q100 | Low-power dual supply translating buffer | NXP Semiconductors |
| 686 | 74AUP1T98GW-Q100 | Low-power configurable gate with voltage-level translator | Nexperia |
| 687 | 74AUP1T98GW-Q100 | Low-power configurable gate with voltage-level translator | NXP Semiconductors |
| 688 | 74AUP2G00DC-Q100 | Low-power dual 2-input NAND gate | Nexperia |
| 689 | 74AUP2G04GW-Q100 | Low-power dual inverter | Nexperia |
| 690 | 74AUP2G79DC-Q100 | Low-power dual D-type flip-flop; positive-edge trigger | Nexperia |
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Datasheets found :: 4418
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